Academics Notices
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Dear Students,
Please find the attachment for the subject cited above.
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Academic Section
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Registration Open for MosChip Technologies Recruitment Drive
Dear Students,
We are pleased to announce the MosChip Recruitment Drive for Graduates of the 2025 batch.
Embedded and Digital fresher hiring for 2025
Job Description I: Read Here
Recruitment for Core SW - ESW & SW Design
MosChip is looking for BE/BTech Final Year Students (going to be passed out) with Electronics or Computer Science as one major stream (ex: CSE, ECE, EEE, EIE Branches) for our requirement to Embedded Software and Software Product Design Teams. Selected students will work on the development of Embedded Software or Product Software which is a dream job for many Computer Science Engineers. The minimum eligibility criteria for writing the examination are that the student must have obtained an overall percentage of minimum 60% marks till now.
The Selection Process follows Three Steps as described below.
Step1: Preliminary Examination (Online), An objective type of online examination for 90-minute duration consisting of questions from Aptitude, Processors and Programming domains. The exam must be conducted at the College premises. The students who clear the Preliminary Examination will be called for writing the Main Examination.
Step2: Main Examination (Physical Paper), The Main examination consists of two papers (Embedded SW and Programming) that must be answered by all Students. The Embedded SW section paper is for 90 minutes duration and Programming Section paper for 90 Minutes duration. Students who clear the Main Examination will be called for interview to finalize selection.
Step3: Interview. The interview is to find out the technical passion of the student. It will be a day long interview to check candidates’ skill and interest in ESW and Programming domains. The idea of the interview is to hand hold and guide students in discovering their area of interest and passion.
ESW Design – Salary Range: 4-6 Lakhs - Job Description:
Candidates will have the opportunity to design the embedded software for various types of Boards that are made to test different applications. Typically, they may work on the following types of applications
• Video and Audio Processing Boards
• AI/ Edge related Applications
• Simple embedded applications for commercial use
• Various development boards for ASICs
• Various evaluations boards for ASICs
• Embedded boards for Auto industry applications
• Industrial sector based embedded applications
Software Product Design – Salary Range: 4-6 Lakhs - Job Description:
Candidates will have the opportunity to design Software Products based on Standards. Typically, they may work on the following product applications
• DLMS Stack Development
• WiFi/USB/Bluetooth/PCIe like Protocol Software
• Application Software for simple embedded applications
• App development on Mobiles
All Selected students who wish to join must abide by
1. Will undergo 6 months training at MISS in their respective domain
2. Every Student must sign a bond for 4 ½ years including training period to serve the company
3. Any student who wishes to break the bond before a 4 ½ year term must pay 8 Lakhs
4. Salary will be decided based on performance during Training
Job Description II: Read Here
Recruitment for Core Electronics - VLSI Analog Design & Digital Design
MosChip is looking for BE/BTech Final Year Students (going to be passed out) with Electronics as one major stream (ex: ECE, EEE, EIE Branches) for our requirement to Analog Design and Digital Design Teams. Selected students will work on product (ASIC) and IP development, which is a dream job for many Electronics Engineers. The minimum eligibility criteria for writing the examination are that the student must have obtained an overall percentage of minimum 60% marks till now.
The Selection Process follows Three Steps as described below.
Step1: Preliminary Examination (Online), An objective type of online examination for 90-minute duration consisting of questions from Aptitude, Analog and Digital domains. The exam must be conducted at the College premises. The students who clear the Preliminary Examination will be called for writing the Main Examination.
Step2: Main Examination (Physical Paper), The Main examination consists of two papers (Analog and Digital) that must be answered by all Students. The Analog section paper is for 90 minutes duration and Digital Section paper for 90 Minutes duration. Students who clear the Main Examination will be called for interview to finalize selection.
Step3: Interview. The interview is to find out the technical passion of the student. It will be a day long interview to check candidates’ skill and interest in Analog and Digital domains. The idea of the interview is to hand hold and guide students in discovering their area of interest and passion.
Analog Design – Salary Range: 6-8 Lakhs - Job Description:
Candidates will have the opportunity to design varieties of analog design blocks based on the products they work for in the Company. Candidates will get an opportunity to work on multiple technologies, across multiple Foundries like TSMC 4nm/5nm/12nm/22nm/65nm/90nm/180nm, GF 22FDX/12nm/40nm, etc... Typically, they may work on the following Blocks
• Analog-to-digital converters (ADC)
• Digital-to-analog converters (DAC)
• Phase-Locked Loop (PLL), DPLL
• Serializer, De-serializer (Serdes)
• Clock and data recovery (CDR) circuits
• Comparators, Threshold detectors
• Regulators, Power Management Circuits
• BGR, Bias Generators, Switching Circuits, Amplifiers
Digital Design – Salary Range: 4-6 Lakhs - Job Description:
Candidates will have the opportunity to design varieties of Digital design blocks based on the products they work for in the Company. Candidates will get an opportunity to work on multiple technologies, across multiple Foundries like TSMC 4nm/5nm/12nm/22nm/65nm/90nm/180nm, GF 22FDX/12nm/40nm, etc... Typically, they may work on the following Blocks
• Industry Standard Protocol Based Designs
• Digital Designs that need to work with Microprocessors
• Algorithm Implementations
• Filters Designs
• Computation Designs
• SoC Related Designs
• Building Design Verification Environment
• Designing BFMs, Checkers, Models etc..
All Selected students who wish to join must abide by
1. Will undergo 6 months training at MISS in their respective domain
2. Every Student must sign a bond for 4 ½ years including training period to serve the company
3. Any student who wishes to break the bond before a 4 ½ year term must pay 8 Lakhs for Digital and 10 Lakhs for Analog Domain
4. Salary will be decided based on performance during Training
How to Apply:
Interested and eligible students can apply through the following link: Apply Here https://forms.gle/pDz3TuAEj4Etzehq6
⏳ Deadline: April 25, 2025.
Training & Placement Office
RGUKT-Basar
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Dear all
Please find the attached document of the subject cited,
Academic Section
RGUKT-Basar
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Dear students,
It is hereby informed to all aspirants of Butterfly Edufields Private Limited that Butterfly Edufields Private Limited conducting recruitment drive for 2018 passing outs . Interested and eligible students need to register.
Note: Interested candidates are required to register in the following link by 25th January 2018, 02:00PM.
Registration Link: http://hub.rgukt.ac.in/hub/tnp/register
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Placement Office
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Dear Principal,
The All India Council for Technical Education (AICTE), invites applications for Scholarship Schemes-PRAGATI (for girl child) and SAKSHAM (for differently abled) Students of B.Tech 1st year admitted in academic year 2016-17 in AICTE approved Technical Institutions of Diploma and Degree level.
1. The last date for online applications is (Date 30.01.2017) up to 5:00 P.M.
2. Incomplete applications are liable to be rejected summarily.
3. Applications received offline will not be entertained.
4. Reservation-15% for SC, 7.5% ST and 27% for OBC candidate/applicant.
5. Bank Account Number of the candidate should be seeded with Aadhaar number before 15th Feb, 2017 for smooth disbursal of scholarship.
Details on eligibility criteria and other relevant information about the schemes will be available at www.aicte-india.org/pragathiSaksham_2016-17.php
Dear Students,
It is to inform you that the Registration date for Mu Sigma drive have been extended to 27th July 2022.
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Placement Office.
Please find the attachment below.
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It is hereby informed to all the E3 students that the Training & Placement cell would like to form the following student body committees for which nominations are invited from all E3 students.
S. No. Category
1 Core Team
2 Web Coordination Team
3 Education Sector Enhancement Team
4 Corporate Relations Team
5 Data Analytics Team
Interested candidates are requested submit their resumes on or before 3rd January 2017 04:00PM at O/o. Training & Placement Cell, Omega-5, old Academic Block.
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T & P Cell.
Download: Notice Attachment
Dear Students,
Please find the enclosed subject-cited.
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Academic Section.
Download: Notice Attachment
Dear Students,
Please find the attachment for the subject cited above.
Sd/-
Academic Section
Download: Notice Attachment
Dear Students,
P2S1 & P2S2 Rem-remedial examinations for 2014 batch will be held from 16/07/2016. Detailed time table will be displayed soon.
Dear Students,
Coordinator,Techest-2025, Department of Physics is inviting proposals for models and posters to be showcased in techfest-2025. Please go through the attached format and submit details to Mr Ramakanth, Assistant Professor, Department of Physics by 5pm,05/03/2025.
HoD,Physics
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Dear students
It is hereby informed to all selects of Ctrl-s, Cygilant and Talentio need to report to placement office at 11:50AM today for confirming your joining at company.
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Placement office
Dear students,
Students have to be present in the examination halls 15 min prior to the start of examination. Please make a note of it.
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Controller of Examinations