E-Notices
Reminder : Return the books which are due on your ID after your exams before vacation.
Published by: LIBRARY RGUKT
Please find the attachment for job notificationPublished by: LIBRARY RGUKT
Dear all,
This is to inform you that India Space Academy has organized an
Astronomy & Astrophysics Summer School 2025. It is a month-long online
summer skill training program for students and faculty. The objective
of the program is to promote space education and employment by
training students and teachers with the skills required for research and
development in astronomy and astrophysics.
During this program, participants will be exposed to the current
developments in astronomy and astrophysics. They will also be trained on
the skills and techniques required to run the sophisticated software
used by astronomers & researchers and also be guided toward a
career in the field of astronomy and astrophysics.
For more information, please find the attached Eligibility notice and guidelines.
Registration Start Date: 15/03/2025
Registration End Date: 25/ 04/2025 till 11:55 PM
URL: Click Here
Published by: ACADEMIC SECTION
Dear Students,
It is hereby informed to B22,B21,B20 Batch students who registered for AY24-25_PUC-II_Annual Exams (Rem-mode) or P2S2_EST(Rem-Mode) Apr-2025 ,that hall tickets will be distributed on 09-04-2025 in ABII-105 from 9:45 AM to 12:00 PM.The students must bring their Id card while collecting the Hall Tickets.
Sd/-
Controller of ExaminationsPublished by: ADDITIONAL COE PUC
Dear Students,
It is hereby informed to B23 Batch students who registered for AY24-25_PUC-II_Annual Exams (Reg-Mode) Apr-2025 ,that hall tickets will be distributed on 09-04-2025 in ABII-105 from 9:45 AM to 11:30 AM.The hall tickets for B23 batch students appearing in regular mode will be distributed to respective Class representatives CRs.The CRs must bring their Id card while collecting the Hall Tickets.
Sd/-
Controller of ExaminationsPublished by: ADDITIONAL COE PUC
Dear Students
pls. note that the Google form for filling in Uniform size can be accessed only through RGUKT Domain mail ID (Eg:B24abcd@rgukt.ac.in) only
Sd/-
ADSWPublished by: ASSOCIATE DEAN STUDENT WELFARE BASARA
Dear students
Please find the attachment.
- Pls. note that the form can be accessed only using RGUKT domain mail ID.
Google form link : https://forms.gle/jPyVQv8rBiDWVtrf7
Sd/-
ADSWURL: Click Here
Published by: ASSOCIATE DEAN STUDENT WELFARE BASARA
Dear Students
Please be vigilant about phishing/malicious links providing offers or claiming to conduct upskilling works and requesting to register you by paying nominal fee. Don't respond to any such messages/Emails.
- Any program that is conducted by the University will be shared through Hub/Official website.
- Never trust unsolicited messages that ask for personal information or request you to click on suspicious links.
- Double-check the source of emails, text messages, and online offers.
Sd/-
ADSWPublished by: ASSOCIATE DEAN STUDENT WELFARE BASARA
This is to inform you all B19 Students, check the status of books which are due on your I.D. Return the books. If already returned, ignore it. After returns your due and No Due status will be update in the list.
Note: If a book is lost, purchase the same book and submit it in the library.
For Late submission late fine will be charged.
Timings : Morning 10:00 AM to 1:00P.M & 2:00P.M to 5:00P.M
Published by: LIBRARY RGUKT
Dear Students
Please use the following number to reach for Institute Ambulance in case of need/Emergency.
Contact No: 08752-255621.
- Pls. use this number to reach for ambulance until further notice.
Sd/-
ADSWPublished by: ASSOCIATE DEAN STUDENT WELFARE BASARA
it is to inform you that due to Sri Rama Navami falling on Sunday, 06.04.2025, the lunch menu scheduled for Sunday will be swapped with Monday's lunch menu (07.04.2025). Sd/- Student welfare OfficePublished by: DOST DOST
It is hereby informed that All PUC-1 & PUC-2, submit your due books after exams.
Late fine will be charged for late submission.
Place :
Central Library, 3rd floor
Timings:
10:00 A.M to 1:00P.M
2:00 P.M to 5:00P.M
Published by: LIBRARY RGUKT
Revolutionize the Future of Computing with Ceremorphic!
We aim to build "Sustainable” Compute Infrastructure – AI semiconductors are the centerpiece of the data-center and enterprise factories of Industry 4.0. Breakthrough evolution of AI model capabilities places stringent and ever-changing demands on performance, cost and power envelope of these AI chips calling for ground up architectures for Intelligent Processing. With more than 200 patents filed Ceremorphic has invented new computing paradigms tailored for the above challenge and is developing silicon and systems products using learnings from decade long research in low power technologies.
Our fast-growing team at Ceremorphic India development center has expertise in Artificial Intelligence hardware and software, digital and analog circuits for multi-terabit processing and communication, device physics, and more. We welcome you to be part of this team developing groundbreaking innovations and shaping the next era of Intelligent Processing with cutting-edge SoC and AI accelerator technologies developed in CMOS nodes from 16nm down to 3nm and beyond! If you are passionate about making a difference and want to be part of a dynamic and innovative team – Ceremorphic is the right place.
About the Role: Engineer – Digital Design
The position involves development of digital subsystems in a complex SoC with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture with multi-level caches, multiple clocks and resets, high-speed interfaces and peripherals. The chosen candidate would do the architecture, microarchitecture and design and verification and would be responsible for the entire design flow and sign-off, including synthesis, LEC, Formality and STA, and be able to deliver reusable and robust digital IP.
Prior Experience
Hands-on experience or Academic Projects involving one or more high end digital designs like multi-core, multi-threaded processor subsystems, high speed interfaces (PCIe, Ethernet, LPDDR, HBM), high performance digital accelerators (Tensor Processing units, Convolution engines, other high performance digital accelerators)
Exposure to design sign-off flows including Lint, CDC, Synthesis, LEC, STA, and Timing Closure.
Familiarity with low-power design methodologies.
Skills Required
Technical Expertise: Verilog, System Verilog, and scripting languages (Python, Perl, Tcl, Shell).
Processor Knowledge: RISC-V, ARM architectures, and protocols like AXI, APB, AHB.
Design Tools: Experience with ASIC and FPGA design flows, DFT (Scan, MBIST, BScan), and UVM methodology.
Analytical Skills: Strong problem-solving abilities with attention to detail.
Low Power Design: Techniques like clock gating, power gating, and dynamic voltage/frequency scaling.
Communication: Good teamwork and collaboration skills, eager to learn and grow.
Educational Requirements: B.Tech or M.Tech/MS in Electronics or Electrical Engineering
Walk-in Interview Details
Dates: April 5, 6, 12, 13, 19, 20
Time Slots:
Please select your preferred timeslot for the interview via the link provided: https://calendly.com/careers-ceremorphic
Location: Ceremorphic Technologies
Interview Process:
The walk-in interview will include a 1-hour written test.
Eligibility Criteria:
Education: B.Tech/BE or M.Tech/MS in Electronics or Electrical Engineering
Aggregate: 70% or above
Experience: 0-2yrs
What to Bring:
An updated resume
A valid govt ID for verification
We look forward to meeting you and discussing how you can contribute to our dynamic and innovative team at Ceremorphic Technologies.
Best Regards,
Hiring Team
Ceremorphic Technologies Published by: TP CELL BASAR
Dear students,
We are inviting you all for the Birthday celebration of Sri. Babu Jagjivan Ram on 05-04-2025 at 10.30 am in the Administrative building, conference hall.Published by: SC/ST CELL RGUKT